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07/31/2023
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
Emerging deep neural network (DNN) applications require high-performance...
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05/09/2023
A High-performance, Energy-efficient Modular DMA Engine Architecture
Data transfers are essential in today's computing systems as latency and...
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01/11/2022
HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing
Heterogeneous computers integrate general-purpose host processors with d...
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04/16/2021
Implementing CNN Layers on the Manticore Cluster-Based Many-Core Architecture
This document presents implementations of fundamental convolutional neur...
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10/07/2020
PsPIN: A high-performance low-power architecture for flexible in-network compute
The capacity of offloading data and control tasks to the network is beco...
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09/11/2020
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication
On-chip communication infrastructure is a central component of modern sy...
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04/07/2020
LLHD: A Multi-level Intermediate Representation for Hardware Description Languages
Modern Hardware Description Languages (HDLs) such as SystemVerilog or VH...
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08/22/2019
Network-Accelerated Non-Contiguous Memory Transfers
Applications often communicate data that is non-contiguous in the send- ...
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08/29/2018
Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with TLB Prefetching and MMU-Aware DMA Engine
Shared virtual memory (SVM) is key in heterogeneous systems on chip (SoC...
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12/18/2017
